Main Page | Assignments Page | Labs Page
In Labs 6 and 7 from CSC 270, we used D flip-flops to create our FSMs. There exists another type of sequencer called a
ROM-based sequencer, which uses memory to store the address of the next state and the data bits of the current state.
In Verilog, there is a way to implement such a sequencer. Rather than using actual ROM, in Verilog, we model it by using
registers and a case construct much like the way we did with the traffic-light sequencer in Lab 7. The following lab
tutorial was taken from the National Instruments ftp site:
ROM-Based Sequencer Tutorial
Part A of this tutorial goes through the step by step process of implementing a ROM-based sequencer in Verilog and
simulating the module using the Xilinx ISE Design Suite.